Voltage regulators are widely used in hardware designs to maintain a steady supply of voltage via a power distribution bus to the various components of an exemplary computer system.
The use of a voltage regulator in the prior art to provide a consistent voltage level at the microprocessor of a computer system is well known. FIG. 1 shows a typical voltage regulator as it is used in the prior art in a typical computer system; the voltage regulator(s) provide a consistent voltage level to one or more various components of a computer system via a power line or a power distribution bus. In many systems today, a computer's microprocessor may have its own, dedicated power regulator.
However, in certain situations the voltage regulator fails to maintain the necessary voltage level resulting in a droop in the power level at the microprocessor, which leads to a delay or failure in performance. One such situation occurs when the microprocessor is at a dormant (e.g. half asleep) state, at which time the microprocessor is called upon to perform a function, which requires a certain amount of power. In some instances the change in current consumption can be as much as 50 amps. This abrupt demand for power from the microprocessor results in a voltage droop in the output of the voltage regulator, which under normal circumstances remains constant. This voltage shortage results in a drop in power level at the microprocessor, which may cause the microprocessor to hang/crash (e.g. the voltage droop reduces the microprocessor's maximum operating frequency) for a period of time until voltage levels are eventually restored. The maximum operating frequency (“Fmax”) of a microprocessor will drop as its supply voltage drops. If the microprocessor has an operating frequency of “Foper” and the supply voltage drops such that Foper>Fmax, then the system will hang/crash. FIG. 2 illustrates how the voltage droop occurs in the output of the voltage regulator when the microprocessor changes states (e.g. when a large clock domain in the microprocessor is turned on). Two mechanisms can cause short term voltage droop. One is due to inductance, and the other is due to resistance. Inductance voltage droop is described by the equation V=L di/dt where the voltage drop across an inductance L is given by the derivative of the current through the inductance with respect to time. Resistive voltage droop is described by the equation V=IR, where I is the current and R is resistance; as I increases, the voltage droop increases.
FIG. 3 shows an example in the prior art of dealing with this problem of power supply droop. One or more levels of capacitors typically support the voltage on the microprocessor die: (a) capacitors on the die; (b) capacitors on the package for the die (around the perimeter of the die); and (c) capacitors on the printed circuit board immediately opposite the microprocessor package. When the voltage droop occurs as in the situation described above, the capacitors discharge, sourcing current, and power is passed to the microprocessor to compensate for the shortage in power due to increased power loading of the microprocessor. However, this technique has significant disadvantages; the capacitance at (a) has limited size as it is on the die and is very expensive, and capacitance at (b) and (c) is limited by the path impedance from the Core Vdd to the capacitors to Vss and back to the Vss of the Core. For an advanced microprocessor the path inductance needs to be less than 20 pH, and the path resistance needs to be less than 100 micro ohms. This gives a droop level of about an appreciable amount of millivolts due to practical limits. Decreasing the droop magnitude requires exponentially less power supply path inductance. This can be attempted with exotic capacitors and more expensive package/board methods, but they cannot eliminate the effect. The invention eliminates the effect at a cheaper cost point.
An example of an embodiment of the present invention is to resolve this problem of droop in the power supply, which can lead to a decrease in microprocessor maximum operating frequency.